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april 2006 rev 5 1/26 1 m27c160 16 mbit (2 mb x 8 or 1 mb x 16) uv eprom and otp eprom features 5v 10% supply voltage in read operation access time: 50 ns byte-wide or word -wide configurable 16 mbit mask rom replacement low power consumption ? active current: 70 ma at 8 mhz ? standby current: 100 a programming voltage: 12.5v 0.25v programming time: 50 s/word electronic signature ? manufacturer code: 20h ? device code: b1h ecopack? packages available 44 1 1 42 1 42 1 42 fdip42w (f) pdip42 (b) sdip42 (s) plcc44 (k) so44 (m) www.st.com
contents m27c160 2/26 contents 1 summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 system considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6 presto iii programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.7 program inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.8 program verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.9 electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.10 erasure operation (applies to uv eprom) . . . . . . . . . . . . . . . . . . . . . . . 11 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 dc and ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1 42-pin ceramic frit-seal di p with window (fdip42wb) . . . . . . . . . . . . . 19 5.2 42-pin plastic dip, 600 mils width (pdip42) . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 42-lead shrink plastic dip, 600 mils width (sdip42) . . . . . . . . . . . . . . . . 21 5.4 44-lead square plastic leaded chip carrier (plcc44) . . . . . . . . . . . . . . 22 5.5 44-lead plastic small outline, 525 mils body width (so44) . . . . . . . . . . . 23 6 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
m27c160 list of tables 3/26 list of tables table 1. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 5. read mode dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 6. programming mode dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 7. capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 8. ac measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 9. read mode ac characteristics (-50 and -70) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 10. read mode ac characteristics (-90, -100, -120 and -150) . . . . . . . . . . . . . . . . . . . . . . . . 16 table 11. programming mode ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 12. fdip42wb package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 13. pdip42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 table 14. sdip42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 table 15. plcc44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 16. so44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 17. ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures m27c160 4/26 list of figures figure 1. logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. plcc connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. dip connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. so connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 5. programming flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. ac testing input output waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 figure 7. ac testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. word-wide read mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 9. byte-wide read mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 10. byte transition ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11. programming and verify modes ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. fdip42wb package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 13. pdip42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 14. sdip42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 15. plcc44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 16. so44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
m27c160 summary description 5/26 1 summary description the m27c160 is a 16-mbit eprom offered in two ranges uv (ultraviolet erase) and otp (one-time programmable). it is ideally suited for micropro cessor systems requiring large data or program storage and is organized as either 2 mbit words of 8 bits or 1 mbit word of 16 bits. the pin-out is compatible with a 16-mbit mask rom. the fdip42w (window ceramic frit-seal package) has a transparent lid which enables the user to expose the chip to ultraviolet light to erase the bit pattern. a new pattern can then be written rapidly to the device by following the programming procedure. for applications where the content is programmed only one time and erasure is not required, the m27c160 is offered in pdip42, sdip42, plcc44 and so44 packages. in order to meet environmental requirements, st offers the m27c160 in ecopack? packages. ecopack packages are lead-free. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. see figure 1: logic diagram and table 1: signal names for a brief overview of the signals connected to this device. figure 1. logic diagram ai00739b 20 a0-a19 bytev pp q0-q14 v cc m27c160 g e v ss 15 q15a?1
summary description m27c160 6/26 figure 2. plcc connections table 1. signal names signal description a0-a19 address inputs q0-q7 data outputs q8-q14 data outputs q15a?1 data output / address input e chip enable g output enable byte v pp byte mode / program supply v cc supply voltage v ss ground nc not connected internally ai03012 a11 a14 q7 q5 23 q0 q8 q1 q9 q2 nc q12 a4 a0 e v ss a3 a2 12 a10 a16 1 a7 bytev pp a13 a5 q6 44 v ss a9 m27c160 a6 a12 q13 v ss q14 34 q10 a1 a15 q15a?1 g q3 q11 v cc q4 a18 a17 a8 a19
m27c160 summary description 7/26 figure 3. dip connections figure 4. so connections g q0 q8 a3 a0 e v ss a2 a1 a13 v ss a14 a15 q7 a12 a16 bytev pp q15a-1 q5 q2 q3 v cc q11 q4 q14 a9 a8 a17 a4 a18 a19 a7 ai00740 m27c160 8 1 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 q1 q9 a6 a5 q6 q13 42 39 38 37 36 35 34 33 a11 a10 q10 21 q12 40 41 g q0 q8 a3 a0 e v ss a2 a1 a13 v ss a14 a15 q7 a12 a16 bytev pp q15a-1 q5 q2 q3 v cc q11 q4 q14 a9 a19 a18 a4 nc nc a7 ai01264 m27c160 8 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 q1 q9 a6 a5 q6 q13 44 39 38 37 36 35 34 33 a11 a10 q10 21 q12 40 43 1 42 41 a17 a8
device description m27c160 8/26 2 device description ta bl e 2 lists the operating modes of the m27c160. a single power supply is required in the read mode. all inputs are ttl compatible except for v pp and 12v on a9 for the electronic signature. note: x = v ih or v il , v id = 12v 0.5v. 2.1 read mode the m27c160 has two organisations, word-wide and byte-wide. the organisation is selected by the signal level on the byte v pp pin. when byte v pp is at v ih the word-wide organisation is selected and the q15a?1 pin is used for q15 data output. when the byte v pp pin is at v il the byte-wide organisation is selected and the q15a?1 pin is used for the address input a?1. when the memory is logically regarded as 16 bit wide, but read in the byte-wide organisation, then with a?1 at v il the lower 8 bits of the 16 bit data are selected and with a?1 at v ih the upper 8 bits of the 16 bit data are selected. the m27c160 has two control functions, both of which must be logically active in order to obtain data at the outputs. in addition the word-wide or byte- wide organisation must be selected. chip enable (e ) is the power control and should be used for device selection. output enable (g ) is the output control and should be used to gate data to the output pins independent of device selection. assuming that the addresses are stable, the address access time (t avqv ) is equal to the delay from e to output (t elqv ). data is available at the output after a delay of t glqv from the falling edge of g , assuming that e has been low and the addresses have been stable for at least t avqv -t glqv . 2.2 standby mode the m27c160 has a standby mode which reduces the active current from 50ma to 100a. the m27c160 is placed in the standby mode by applying a cmos high signal to the e input. table 2. operating modes mode e g byte v pp a9 q15a?1 q8-q14 q7-q0 read word-wide v il v il v ih x data out data out data out read byte-wide upper v il v il v il xv ih hi-z data out read byte-wide lower v il v il v il xv il hi-z data out output disable v il v ih x x hi-z hi-z hi-z program v il pulse v ih v pp x data in data in data in verify v ih v il v pp x data out data out data out program inhibit v ih v ih v pp x hi-z hi-z hi-z standby v ih x x x hi-z hi-z hi-z electronic signature v il v il v ih v id code codes codes
m27c160 device description 9/26 when in the standby mode, the outputs are in a high impedance state, independent of the g input. 2.3 two-line output control because eproms are usually used in larger me mory arrays, this product features a 2-line control function which accommodates the use of multiple memory connection. the two line control function allows: the lowest possible memory power dissipation, complete assurance that output bus contention will not occur. for the most efficient use of these two control lines, e should be decoded and used as the primary device selecting function, while g should be made a common connection to all devices in the array and connected to the read line from the system control bus. this ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. 2.4 system considerations the power switching characteristics of advanced cmos eproms require careful decoupling of the supplies to the devices. the supply current i cc has three segments of importance to the system designer: the standby current, the active current and the transient peaks that are produced by th e falling and rising edges of e . the magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device outputs. the associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. it is recommended that a 0.1f ceramic capacitor is used on every device between v cc and v ss . this should be a high frequency type of low inherent inductance and should be placed as close as possible to the device. in addition, a 4.7f electrolytic capacitor should be used between v cc and v ss for every eight devices. this capacitor should be mounted near the power supply connection point. the purpose of this capacitor is to overcome the voltage drop caused by the inductive effects of pcb traces. 2.5 programming when delivered (and after each erasure for uv eprom), all bits of the m27c160 are in the '1' state. data is introduced by selectively programming '0's into the desired bit locations. although only '0's will be programmed, both '1 's and '0's can be present in the data word. the only way to change a '0' to a '1' is by die exposure to ultraviolet light (uv eprom). the m27c160 is in the programming mode when v pp input is at 12.5v, g is at v ih and e is pulsed to v il . the data to be programmed is applied to 16 bits in parallel to the data output pins. the levels required for the address and data inputs are ttl. v cc is specified to be 6.25v 0.25v. 2.6 presto iii prog ramming algorithm the presto iii programming algorithm allows the whole array to be programed with a guaranteed margin in a typical time of 52.5 seconds. programming with presto iii consists of
device description m27c160 10/26 applying a sequence of 50s program pulses to each word until a correct verify occurs (see figure 5 ). during programing and verify operation a margin mode circuit is automatically activated to guarantee that each cell is programed with enough margin. no overprogram pulse is applied since the verify in margin mode provides the necessary margin to each programmed cell. figure 5. programming flowchart 2.7 program inhibit programming of multiple m27c 160s in parallel with different data is also easily accomplished. except for e , all like inputs including g of the parallel m27c160 may be common. a ttl low level pulse applied to a m27c160's e input and v pp at 12.5v, will program that m27c160. a high level e input inhibits the other m27c160s from being programmed. 2.8 program verify a verify (read) should be performed on the programmed bits to determine that they were correctly programmed. the verify is accomplished with e at v ih and g at v il , v pp at 12.5v and v cc at 6.25v. 2.9 electronic signature the electronic signature (es) mode allows the reading out of a binary code from an eprom that will identify its manufacturer an d type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. the es mode is functional in the 25c 5c ai01044b n = 0 last addr verify e = 50 s pulse ++n = 25 ++ addr v cc = 6.25v, v pp = 12.5v fail check all words bytev pp =v ih 1st: v cc = 6v 2nd: v cc = 4.2v yes no yes no yes no
m27c160 device description 11/26 ambient temperature range that is required when programming the m27c160. to activate the es mode, the programming equipment must force 11.5v to 12.5v on address line a9 of the m27c160, with v pp = v cc = 5v. two identifier bytes may then be sequenced from the device outputs by toggling address line a0 from v il to v ih . all other address lines must be held at v il during electronic signature mode. byte 0 (a0 = v il ) represents the manufacturer code and byte 1 (a0 = v ih ) the device identifier code. for the stmicroelectronics m27c160, these two identifier bytes are given in ta b l e 3 and can be read-out on outputs q7 to q0. note: outputs q15-q8 are set to '0'. 2.10 erasure operation (applies to uv eprom) the erasure characteristics of the m27c160 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 ?. it should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 ? range. research shows that constant exposure to room level fluorescent lighting could erase a typical m27c160 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. if the m27c160 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the m27c160 window to prevent unintentional erasure. the recommended erasure procedure for m27c160 is exposure to short wave ultraviolet light which has a wavelength of 2537 ?. the integrated dose (i.e. uv intensity x exposure time) for erasure should be a minimum of 30 w-sec/cm 2. the erasure time with this dosage is approximately 30 to 40 minutes using an ultraviolet lamp with 12000 w/cm 2 power rating. the m27c160 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. some lamps have a filter on their tubes which should be removed before erasure. table 3. electronic signature identifier a0 q7 q6 q5 q4 q3 q2 q1 q0 hex data manufacturer?s code v il 00100000 20h device code v ih 10110001 b1h
maximum ratings m27c160 12/26 3 maximum ratings table 4. absolute maximum ratings (1) 1. except for the rating "operating temperature range" , stresses above those listed in the table "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum ra ting conditions for extended periods may affect device reliability. refer also to the st microelectronics sure program and other relevant quality documents. symbol parameter value unit t a ambient operating temperature (2) 2. depends on range. ?40 to 125 c t bias temperature under bias ?50 to 125 c t stg storage temperature ?65 to 150 c v io (3) 3. minimum dc voltage on input or output is ?0.5v wi th possible undershoot to ?2.0v for a period less than 20ns. maximum dc voltage on output is vcc +0.5v with pos sible overshoot to vcc +2v for a period less than 20ns. input or output voltage (except a9) ?2 to 7 v v cc supply voltage ?2 to 7 v v a9 (3) a9 voltage ?2 to 13.5 v v pp program supply voltage ?2 to 14 v
m27c160 dc and ac characteristics 13/26 4 dc and ac characteristics t a = 0 to 70 c or ?40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc t a = 25 c; v cc = 6.25v 0.25v; v pp = 12.5v 0.25v table 5. read mode dc characteristics (1) 1. v cc must be applied simultaneously with or before vpp and removed simultaneously or after v pp . symbol parameter test condition min. max. unit i li input leakage current 0v v in v cc 1 a i lo output leakage current 0v v out v cc 10 a i cc supply current e = v il , g = v il , i out = 0ma, f = 8mhz 70 ma e = v il , g = v il , i out = 0ma, f = 5mhz 50 ma i cc1 supply current (standby) ttl e = v ih 1ma i cc2 supply current (standby) cmos e > v cc ? 0.2v 100 a i pp program current v pp = v cc 10 a v il input low voltage ?0.3 0.8 v v ih (2) 2. maximum dc voltage on output is v cc +0.5v. input high voltage 2 v cc + 1 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = ?400a 2.4 v table 6. programming mode dc characteristics (1) 1. v cc must be applied simultaneously with or before vpp and removed simultaneously or after v pp . symbol parameter test condition min. max. unit i li input leakage current 0 v in v cc 1 a i cc supply current 50 ma i pp program current e = v il 50 ma v il input low voltage ?0.3 0.8 v v ih input high voltage 2.4 v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = ?2.5ma 3.5 v v id a9 voltage 11.5 12.5 v
dc and ac characteristics m27c160 14/26 t a = 25 c, f = 1 mhz figure 6. ac testing input output waveform figure 7. ac testing load circuit table 7. capacitance (1) 1. sampled only, not 100% tested. symbol parameter test condition min. max. unit c in input capacitance (except byte v pp )v in = 0v 10 pf input capacitance (byte v pp )v in = 0v 120 pf c out output capacitance v out = 0v 12 pf table 8. ac measurement conditions parameter high speed standard input rise and fall times 10ns 20ns input pulse voltages 0 to 3v 0.4v to 2.4v input and output timing ref. voltages 1.5v 0.8v and 2v ai01822 3v high speed 0v 1.5v 2.4v standard 0.4v 2.0v 0.8v ai01823b 1.3v out c l c l = 30pf for high speed c l = 100pf for standard c l includes jig capacitance 3.3k ? 1n914 device under test
m27c160 dc and ac characteristics 15/26 t a = 0 to 70 c or ?40 to 85 c; v cc = 5v 5% or 5v 10%; v pp = v cc table 9. read mode ac characteristics (1) (-50 and -70) 1. v cc must be applied simultaneously with or before vpp and removed simultaneously or after v pp . symbol alt parameter test condition m27c160 unit -50 (2) 2. speed obtained with high speed ac measurement conditions. -70 (2) min. max. min. max. t avqv t acc address valid to output valid e = v il , g = v il 50 70 ns t bhqv t st byte high to output valid e = v il , g = v il 50 70 ns t elqv t ce chip enable low to output valid g = v il 50 70 ns t glqv t oe output enable low to output valid e = v il 30 35 ns t blqz (3) 3. sampled only, not 100% tested. t std byte low to output hi-z e = v il , g = v il 30 30 ns t ehqz (3) t df chip enable high to output hi-z g = v il 025025ns t ghqz (3) t df output enable high to outputhi-z e = v il 025025ns t axqx t oh address transition to output tr a n s i t i o n e = v il , g = v il 55ns t blqx t oh byte low to output transition e = v il , g = v il 55ns
dc and ac characteristics m27c160 16/26 figure 8. word-wide read mode ac waveforms note: byte v pp = v ih . table 10. read mode ac characteristics (1) (-90, -100, -120 and -150) 1. v cc must be applied simultaneously with or before vpp and removed simultaneously or after v pp . symbol alt parameter test condition m27c160 unit -90 (2) 2. speed obtained with high speed ac measurement conditions. -100 (2) -120/-150 (2) min. max. min. max. min. max. t avqv t acc address valid to output valid e = v il , g = v il 90 100 120 ns t bhqv t st byte high to output valid e = v il , g = v il 90 100 120 ns t elqv t ce chip enable low to output valid g = v il 90 100 120 ns t glqv t oe output enable low to output valid e = v il 45 50 60 ns t blqz (3) 3. sampled only, not 100% tested. t std byte low to output hi- z e = v il , g = v il 30 40 50 ns t ehqz (3) t df chip enable high to output hi-z g = v il 030040050ns t ghqz (3) t df output enable high to outputhi-z e = v il 030040050ns t axqx t oh address transition to output transition e = v il , g = v il 555ns t blqx t oh byte low to output transition e = v il , g = v il 555ns ai00741b taxqx tehqz a0-a19 e g q0-q15 tavqv tghqz tglqv telqv valid hi-z valid
m27c160 dc and ac characteristics 17/26 figure 9. byte-wide read mode ac waveforms note: byte v pp = v il . figure 10. byte transition ac waveforms note: chip enable (e ) and output enable (g ) = v il . ai00742b taxqx tehqz a?1,a0-a19 e g q0-q7 tavqv tghqz tglqv telqv valid hi-z valid ai00743c taxqx tbhqv a0-a19 bytev pp tavqv tblqx tblqz valid hi-z a?1 data out data out valid q0-q7 q8-q15
dc and ac characteristics m27c160 18/26 t a = 25 c; v cc = 6.25v 0.25v; v pp = 12.5v 0.25v figure 11. programming and verify modes ac waveforms table 11. programming mode ac characteristics (1) 1. v cc must be applied simultaneously with or before vpp and removed simultaneously or after v pp . symbol alt parameter test condition min max unit t avel t as address valid to chip enable low 2 s t qvel t ds input valid to chip enable low 2 s t vphav t vps v pp high to address valid 2 s t vchav t vcs v cc high to address valid 2 s t eleh t pw chip enable program pulse width 45 55 s t ehqx t dh chip enable high to input transition 2 s t qxgl t oes input transition to output enable low 2 s t glqv t oe output enable low to output valid 120 ns t ghqz (2) 2. sampled only, not 100% tested. t dfp output enable high to output hi-z 0 130 ns t ghax t ah output enable high to address tr a n s i t i o n 0ns tavel valid ai00744 a0-a19 q0-q15 bytev pp v cc g data in data out e tqvel tvphav tvchav tehqx teleh tglqv tqxgl tghqz tghax program verify
m27c160 package mechanical data 19/26 5 package mechanical data 5.1 42-pin ceramic frit-seal dip with window (fdip42wb) figure 12. fdip42wb package outline table 12. fdip42wb package mechanical data symbol millimeters inches min. typ. max. min. typ. max. a5.710.225 a1 0.50 1.78 0.020 0.070 a2 3.90 5.08 0.154 0.200 b 0.40 0.55 0.016 0.022 b1 1.27 1.52 0.050 0.060 c 0.22 0.31 0.009 0.012 d 54.81 2.158 d2 50.80 2.000 e 15.24 0.600 e1 14.50 14.90 0.571 0.587 e 2.29 2.79 0.090 0.110 ea 15.40 15.80 0.606 0.622 eb 16.17 18.32 0.637 0.721 k 9.32 9.47 0.367 0.373 k1 11.30 11.55 0.445 0.455 l 3.18 4.10 0.125 0.161 s 1.52 2.49 0.060 0.098 4 15 4 15 n42 42 fdipw-c a2 a1 a l b1 b e d s e1 e n 1 c ea d2 k k1 eb
package mechanical data m27c160 20/26 5.2 42-pin plastic dip, 600 mils width (pdip42) figure 13. pdip42 package outline table 13. pdip42 package mechanical data symbol millimeters inches min. typ. max. min. typ. max. a5.080.200 a1 0.25 0.010 a2 3.56 4.06 0.140 0.160 b 0.38 0.53 0.015 0.021 b1 1.27 1.65 0.050 0.065 c 0.20 0.36 0.008 0.014 d 52.20 52.71 2.055 2.075 d2 50.80 2.000 e 15.24 0.600 e1 13.59 13.84 0.535 0.545 e1 2.54 0.100 ea 14.99 0.590 eb 15.24 17.78 0.600 0.700 l 3.18 3.43 0.125 0.135 s 0.86 1.37 0.034 0.054 0 10 0 10 n42 42 pdip a2 a1 a l b1 b e1 d s e1 e n 1 c ea eb d2
m27c160 package mechanical data 21/26 5.3 42-lead shrink plastic dip, 600 mils width (sdip42) figure 14. sdip42 package outline table 14. sdip42 package mechanical data symbol millimeters inches min. typ. max. min. typ. max. a5.080.200 a1 0.51 0.020 a2 3.05 3.81 4.57 0.120 0.150 0.180 b 0.38 0.46 0.56 0.015 0.018 0.022 b2 0.89 1.02 1.14 0.035 0.040 0.045 c 0.23 0.25 0.38 0.009 0.010 0.015 d 36.58 36.83 37.08 1.440 1.450 1.460 d2 35.60 1.402 e 1.78 0.070 e 15.24 16.00 0.600 0.630 e1 12.70 13.72 14.48 0.500 0.540 0.570 ea 15.24 0.600 eb 18.54 0.730 l 2.54 3.30 3.56 0.100 0.130 0.140 s 0.64 0.025 n42 42 sdip a2 a1 a l b2 b e d s e1 e n 1 c ea eb d2
package mechanical data m27c160 22/26 5.4 44-lead square plastic le aded chip carrier (plcc44) figure 15. plcc44 package outline table 15. plcc44 package mechanical data symbol millimeters inches min. typ. max. min. typ. max. a 4.200 4.570 0.1654 0.1799 a1 2.290 3.040 0.0902 0.1197 a2 3.650 3.700 0.1437 0.1457 b 0.331 0.533 0.0130 0.0210 b1 0.661 0.812 0.0260 0.0320 cp 0.101 0.0040 c 0.510 0.0201 d 17.400 17.650 0.6850 0.6949 d1 16.510 16.662 0.6500 0.6560 d2 14.990 16.000 0.5902 0.6299 d3 12.700 0.5000 e 17.400 17.650 0.6850 0.6949 e1 16.510 16.660 0.6500 0.6559 e2 14.990 16.000 0.5902 0.6299 e3 12.700 0.5000 e 1.270 0.0500 n44 44 plcc-b d e3 e1 e 1 n d1 d3 cp b e2 e b1 a1 a c d2 a2
m27c160 package mechanical data 23/26 5.5 44-lead plastic small outline, 525 mils body width (so44) figure 16. so44 package outline table 16. so44 package mechanical data symbol millimeters inches min. typ. max. min. typ. max. a 2.80 0.1102 a1 0.10 0.0039 a2 2.20 2.30 2.40 0.0866 0.0906 0.0945 b 0.35 0.40 0.50 0.0138 0.0157 0.0197 c 0.10 0.15 0.20 0.0039 0.0059 0.0079 cp 0.08 0.0030 d 28.00 28.20 28.40 1.1024 1.1102 1.1181 e 13.20 13.30 13.50 0.5197 0.5236 0.5315 eh 15.75 16.00 16.25 0.6201 0.6299 0.6398 e 1.27 0.0500 l 0.80 0.0315 8 8 n44 44 so-d e n d c l a1 eh a 1 e cp b a2
part numbering m27c160 24/26 6 part numbering table 17. ordering information scheme for a list of available options (speed, package, etc...) or for further information on any aspect of this device, please contact the st microelectronics sales office nearest to you. example: m27c160 -70 x m 1 device type m27 supply voltage c = 5v device function 160 = 16 mbit (2mb x 8 or 1mb x 16) speed -50 (1) = 50 ns 1. high speed, see ac characteristi cs section for further information. -70 (1) = 70 ns -90 = 90 ns -100 = 100 ns -120 = 120 ns -150 = 150 ns v cc tolerance blank = 10% x = 5% package f = fdip42w b = pdip42 s = sdip42 k = plcc44 m = so44 temperature range 1 = 0 to 70 c 6 = ?40 to 85 c
m27c160 revision history 25/26 7 revision history table 18. document revision history date revision changes january 1999 1 first issue 20-sep-00 2 an620 reference removed 19-jul-01 3 sdip42 package added 17-jan-02 4 50ns speed class added, so44 package mechanical data and drawing clarified 12-apr-2006 5 converted to new template. updated ecopack? information. removed tape & reel info.
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